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authorYanfei Xu <[email protected]>2024-08-28 16:42:30 +0800
committerDave Jiang <[email protected]>2024-09-09 11:33:44 -0700
commit99bf0eebc75c9085440d6dca014724e7e49b5116 (patch)
tree1a72d3e3899d682dc38bad0ba2d223e62b06cd5a /drivers/gpu/drm/amd/amdgpu
parent5c6e3d5a5da118be2ae074bd70d111994147c708 (diff)
cxl/pci: Check Mem_info_valid bit for each applicable DVSEC
In theory a device might set the mem_info_valid bit for a first range after it is ready but before as second range has reached that state. Therefore, the correct approach is to check the Mem_info_valid bit for each applicable DVSEC range against HDM_COUNT, rather than only for the DVSEC range 1. Consequently, let's move the check into the "for loop" that handles each DVSEC range. Reviewed-by: Jonathan Cameron <[email protected]> Signed-off-by: Yanfei Xu <[email protected]> Reviewed-by: Alison Schofield <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Dave Jiang <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
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