diff options
| author | Leo Liu <leo.liu@amd.com> | 2017-02-15 10:16:25 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-05-24 17:41:39 -0400 |
| commit | 3639f7d855746406c1c1df81560b4d1d83e8c5a4 (patch) | |
| tree | 551498a63fdf8273260d8e4003b5e7623a3aaed4 /drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | |
| parent | f2d7e7070896c43d80419a70e446226e3e134fe9 (diff) | |
drm/amdgpu: change vcn dec rb command specific for decode
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c index ee27c79ea236..2e650685e35a 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c @@ -500,7 +500,7 @@ static void vcn_v1_0_dec_ring_insert_start(struct amdgpu_ring *ring) amdgpu_ring_write(ring, 0); amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); - amdgpu_ring_write(ring, VCN_CMD_PACKET_START << 1); + amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_START << 1); } /** @@ -514,7 +514,7 @@ static void vcn_v1_0_dec_ring_insert_end(struct amdgpu_ring *ring) { amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); - amdgpu_ring_write(ring, VCN_CMD_PACKET_END << 1); + amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_END << 1); } /** @@ -541,7 +541,7 @@ static void vcn_v1_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff); amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); - amdgpu_ring_write(ring, VCN_CMD_FENCE << 1); + amdgpu_ring_write(ring, VCN_DEC_CMD_FENCE << 1); amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0)); @@ -551,7 +551,7 @@ static void vcn_v1_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 amdgpu_ring_write(ring, 0); amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); - amdgpu_ring_write(ring, VCN_CMD_TRAP << 1); + amdgpu_ring_write(ring, VCN_DEC_CMD_TRAP << 1); } /** @@ -605,7 +605,7 @@ static void vcn_v1_0_dec_vm_reg_write(struct amdgpu_ring *ring, amdgpu_ring_write(ring, data1); amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); - amdgpu_ring_write(ring, VCN_CMD_WRITE_REG << 1); + amdgpu_ring_write(ring, VCN_DEC_CMD_WRITE_REG << 1); } static void vcn_v1_0_dec_vm_reg_wait(struct amdgpu_ring *ring, @@ -622,7 +622,7 @@ static void vcn_v1_0_dec_vm_reg_wait(struct amdgpu_ring *ring, amdgpu_ring_write(ring, mask); amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); - amdgpu_ring_write(ring, VCN_CMD_REG_READ_COND_WAIT << 1); + amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1); } static void vcn_v1_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, |