diff options
author | Dave Airlie <airlied@redhat.com> | 2022-03-01 16:19:02 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2022-03-01 16:19:02 +1000 |
commit | 38a15ad9488e21cad8f42d3befca20f91e5b2874 (patch) | |
tree | 1cf0076b59faba3cd3db4e05d3ee071a3c218cbe /drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | |
parent | 6c64ae228f0826859c56711ce133aff037d6205f (diff) | |
parent | 111aeed25ec6bf4d5b4a7b4cb5654f002ba9f795 (diff) |
Merge tag 'amd-drm-next-5.18-2022-02-25' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.18-2022-02-25:
amdgpu:
- Raven2 suspend/resume fix
- SDMA 5.2.6 updates
- VCN 3.1.2 updates
- SMU 13.0.5 updates
- DCN 3.1.5 updates
- Virtual display fixes
- SMU code cleanup
- Harvest fixes
- Expose benchmark tests via debugfs
- Drop no longer relevant gart aperture tests
- More RAS restructuring
- W=1 fixes
- PSR rework
- DP/VGA adapter fixes
- DP MST fixes
- GPUVM eviction fix
- GPU reset debugfs register dumping support
- Misc display fixes
- SR-IOV fix
- Aldebaran mGPU fix
- Add module parameter to disable XGMI for testing
amdkfd:
- IH ring overflow logging fixes
- CRIU fixes
- Misc fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220225183535.5907-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c index 44f17bbfeb6a..6f81de6f3cc4 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c @@ -61,6 +61,7 @@ static u32 nbio_v7_2_get_rev_id(struct amdgpu_device *adev) switch (adev->ip_versions[NBIO_HWIP][0]) { case IP_VERSION(7, 2, 1): + case IP_VERSION(7, 3, 0): case IP_VERSION(7, 5, 0): tmp = RREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_DEV0_EPF0_STRAP0_YC); break; @@ -79,6 +80,7 @@ static void nbio_v7_2_mc_access_enable(struct amdgpu_device *adev, bool enable) { switch (adev->ip_versions[NBIO_HWIP][0]) { case IP_VERSION(7, 2, 1): + case IP_VERSION(7, 3, 0): case IP_VERSION(7, 5, 0): if (enable) WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN_YC, @@ -262,6 +264,7 @@ static void nbio_v7_2_update_medium_grain_light_sleep(struct amdgpu_device *adev switch (adev->ip_versions[NBIO_HWIP][0]) { case IP_VERSION(7, 2, 1): + case IP_VERSION(7, 3, 0): case IP_VERSION(7, 5, 0): def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CNTL2)); if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) @@ -368,6 +371,7 @@ static void nbio_v7_2_init_registers(struct amdgpu_device *adev) uint32_t def, data; switch (adev->ip_versions[NBIO_HWIP][0]) { case IP_VERSION(7, 2, 1): + case IP_VERSION(7, 3, 0): case IP_VERSION(7, 5, 0): def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regBIF1_PCIE_MST_CTRL_3)); data = REG_SET_FIELD(data, BIF1_PCIE_MST_CTRL_3, |