diff options
| author | Takashi Iwai <[email protected]> | 2019-09-14 17:24:57 +0200 |
|---|---|---|
| committer | Takashi Iwai <[email protected]> | 2019-09-14 17:26:10 +0200 |
| commit | d3f9990f1b48514b33342612b51fad238592d774 (patch) | |
| tree | 9ad5ae81ba3e820e91a09e2675b7c98675bd809e /drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | |
| parent | e1a00b5b253a4f97216b9a33199a863987075162 (diff) | |
| parent | 7711fb7dac1ab77fd1b4d948f4647a569e4a1ae2 (diff) | |
Merge branch 'for-next' into for-linus
Signed-off-by: Takashi Iwai <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c index 2471e7cf75ea..235548c0b41f 100644 --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c @@ -26,6 +26,7 @@ #include "nbio/nbio_6_1_sh_mask.h" #include "gc/gc_9_0_offset.h" #include "gc/gc_9_0_sh_mask.h" +#include "mp/mp_9_0_offset.h" #include "soc15.h" #include "vega10_ih.h" #include "soc15_common.h" @@ -343,7 +344,7 @@ flr_done: /* Trigger recovery for world switch failure if no TDR */ if (amdgpu_device_should_recover_gpu(adev) - && amdgpu_lockup_timeout == MAX_SCHEDULE_TIMEOUT) + && adev->sdma_timeout == MAX_SCHEDULE_TIMEOUT) amdgpu_device_gpu_recover(adev, NULL); } @@ -448,6 +449,20 @@ void xgpu_ai_mailbox_put_irq(struct amdgpu_device *adev) amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); } +static void xgpu_ai_init_reg_access_mode(struct amdgpu_device *adev) +{ + adev->virt.reg_access_mode = AMDGPU_VIRT_REG_ACCESS_LEGACY; + + /* Enable L1 security reg access mode by defaul, as non-security VF + * will no longer be supported. + */ + adev->virt.reg_access_mode |= AMDGPU_VIRT_REG_ACCESS_RLC; + + adev->virt.reg_access_mode |= AMDGPU_VIRT_REG_ACCESS_PSP_PRG_IH; + + adev->virt.reg_access_mode |= AMDGPU_VIRT_REG_SKIP_SEETING; +} + const struct amdgpu_virt_ops xgpu_ai_virt_ops = { .req_full_gpu = xgpu_ai_request_full_gpu_access, .rel_full_gpu = xgpu_ai_release_full_gpu_access, @@ -456,4 +471,5 @@ const struct amdgpu_virt_ops xgpu_ai_virt_ops = { .trans_msg = xgpu_ai_mailbox_trans_msg, .get_pp_clk = xgpu_ai_get_pp_clk, .force_dpm_level = xgpu_ai_force_dpm_level, + .init_reg_access_mode = xgpu_ai_init_reg_access_mode, }; |