diff options
| author | Dmitry Torokhov <[email protected]> | 2023-02-21 11:19:49 -0800 | 
|---|---|---|
| committer | Dmitry Torokhov <[email protected]> | 2023-02-21 11:19:49 -0800 | 
| commit | 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18 (patch) | |
| tree | dbdd35328f43569c38c4ce193cefd7d2b6b9fbfd /drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | |
| parent | 9c445d2637c938a800fcc8b5f0b10e60c94460c7 (diff) | |
| parent | 9e69e845ae95227949c400af1037dca023f73038 (diff) | |
Merge branch 'next' into for-linus
Prepare input updates for 6.3 merge window.
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 19 | 
1 files changed, 11 insertions, 8 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c index f513e2c2e964..21e46817d82d 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c @@ -371,7 +371,9 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,  	 * translation. Avoid this by doing the invalidation from the SDMA  	 * itself.  	 */ -	r = amdgpu_job_alloc_with_ib(adev, 16 * 4, AMDGPU_IB_POOL_IMMEDIATE, +	r = amdgpu_job_alloc_with_ib(ring->adev, &adev->mman.entity, +				     AMDGPU_FENCE_OWNER_UNDEFINED, +				     16 * 4, AMDGPU_IB_POOL_IMMEDIATE,  				     &job);  	if (r)  		goto error_alloc; @@ -380,10 +382,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,  	job->vm_needs_flush = true;  	job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;  	amdgpu_ring_pad_ib(ring, &job->ibs[0]); -	r = amdgpu_job_submit(job, &adev->mman.entity, -			      AMDGPU_FENCE_OWNER_UNDEFINED, &fence); -	if (r) -		goto error_submit; +	fence = amdgpu_job_submit(job);  	mutex_unlock(&adev->mman.gtt_window_lock); @@ -392,9 +391,6 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,  	return; -error_submit: -	amdgpu_job_free(job); -  error_alloc:  	mutex_unlock(&adev->mman.gtt_window_lock);  	DRM_ERROR("Error flushing GPU TLB using the SDMA (%d)!\n", r); @@ -612,6 +608,8 @@ static void gmc_v10_0_get_vm_pte(struct amdgpu_device *adev,  				 struct amdgpu_bo_va_mapping *mapping,  				 uint64_t *flags)  { +	struct amdgpu_bo *bo = mapping->bo_va->base.bo; +  	*flags &= ~AMDGPU_PTE_EXECUTABLE;  	*flags |= mapping->flags & AMDGPU_PTE_EXECUTABLE; @@ -628,6 +626,11 @@ static void gmc_v10_0_get_vm_pte(struct amdgpu_device *adev,  		*flags |= AMDGPU_PTE_SYSTEM;  		*flags &= ~AMDGPU_PTE_VALID;  	} + +	if (bo && bo->flags & (AMDGPU_GEM_CREATE_COHERENT | +			       AMDGPU_GEM_CREATE_UNCACHED)) +		*flags = (*flags & ~AMDGPU_PTE_MTYPE_NV10_MASK) | +			 AMDGPU_PTE_MTYPE_NV10(MTYPE_UC);  }  static unsigned gmc_v10_0_get_vbios_fb_size(struct amdgpu_device *adev) |