diff options
| author | Thomas Gleixner <[email protected]> | 2020-06-11 15:17:57 +0200 | 
|---|---|---|
| committer | Thomas Gleixner <[email protected]> | 2020-06-11 15:17:57 +0200 | 
| commit | f77d26a9fc525286bcef3d4f98b52e17482cf49c (patch) | |
| tree | 6b179c9aa84787773cb601a14a64255e2912154b /drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | |
| parent | b6bea24d41519e8c31e4798f1c1a3f67e540c5d0 (diff) | |
| parent | f0178fc01fe46bab6a95415f5647d1a74efcad1b (diff) | |
Merge branch 'x86/entry' into ras/core
to fixup conflicts in arch/x86/kernel/cpu/mce/core.c so MCE specific follow
up patches can be applied without creating a horrible merge conflict
afterwards.
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/dce_v11_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 8 | 
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c index 0dde22db9848..2584ff74423b 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c @@ -2382,9 +2382,9 @@ static void dce_v11_0_hide_cursor(struct drm_crtc *crtc)  	struct amdgpu_device *adev = crtc->dev->dev_private;  	u32 tmp; -	tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); +	tmp = RREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);  	tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 0); -	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); +	WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);  }  static void dce_v11_0_show_cursor(struct drm_crtc *crtc) @@ -2398,10 +2398,10 @@ static void dce_v11_0_show_cursor(struct drm_crtc *crtc)  	WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,  	       lower_32_bits(amdgpu_crtc->cursor_addr)); -	tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); +	tmp = RREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);  	tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1);  	tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2); -	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); +	WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);  }  static int dce_v11_0_cursor_move_locked(struct drm_crtc *crtc,  |