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| author | Mark Brown <[email protected]> | 2024-01-30 15:43:53 +0000 |
|---|---|---|
| committer | Will Deacon <[email protected]> | 2024-02-09 16:34:23 +0000 |
| commit | 61da7c8e2a602f66be578cbbcebe8638c10e0f48 (patch) | |
| tree | ab3697e707983b5e38c2b09935f001b2884a7e18 /drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c | |
| parent | 54be6c6c5ae8e0d93a6c4641cb7528eb0b6ba478 (diff) | |
arm64/signal: Don't assume that TIF_SVE means we saved SVE state
When we are in a syscall we will only save the FPSIMD subset even though
the task still has access to the full register set, and on context switch
we will only remove TIF_SVE when loading the register state. This means
that the signal handling code should not assume that TIF_SVE means that
the register state is stored in SVE format, it should instead check the
format that was recorded during save.
Fixes: 8c845e273104 ("arm64/sve: Leave SVE enabled on syscall if we don't context switch")
Signed-off-by: Mark Brown <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c')
0 files changed, 0 insertions, 0 deletions