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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-10-31 15:57:03 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-11-02 08:55:56 +0200 |
| commit | 1086af67b9ab5229a8166909df01f289bc9a17bd (patch) | |
| tree | 986891cd52657983d2fbc2c429ba41f483a998c6 /drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | |
| parent | 38530a37de499bbb6244018d8d515995fbd89441 (diff) | |
drm/i915/selftests: Run the perf MI_BB tests on gen4/5
Now that we know the ring timestamp frequency on gen4/5 we
can run the perf tests that depend on sampling the timestamp.
On g4x/ilk we must read the udw of the 64bit timestamp
register. Details in {g4x,gen5)_read_clock_frequency().
When executing the read via the CS i965 doesn't seem to need
the double read trick that CPU mmio reads need.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221031135703.14670-7-ville.syrjala@linux.intel.com
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c')
0 files changed, 0 insertions, 0 deletions