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authorLuben Tuikov <luben.tuikov@amd.com>2021-06-11 02:15:49 -0400
committerAlex Deucher <alexander.deucher@amd.com>2021-07-01 00:25:33 -0400
commit9de96f3f7e33db4666530d3dfa5dd26a953e077e (patch)
tree163604d5061db561e2bc6b53044c3af32e32ff6e /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
parente2e04041a25feff31faf5768caca2fef120209cb (diff)
drm/amdgpu: Correctly disable the I2C IP block
On long transfers to the EEPROM device, i.e. write, it is observed that the driver aborts the transfer. The reason for this is that the driver isn't patient enough--the IC_STATUS register's contents is 0x27, which is MST_ACTIVITY | TFE | TFNF | ACTIVITY. That is, while the transmission FIFO is empty, we, the I2C master device, are still driving the bus. Implement the correct procedure to disable the block, as described in the DesignWare I2C Databook, section 3.8.3 Disabling DW_apb_i2c on page 56. Now there are no premature aborts on long data transfers. Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Alexander Deucher <Alexander.Deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h')
0 files changed, 0 insertions, 0 deletions