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| author | Dhinakaran Pandiyan <[email protected]> | 2019-07-17 15:34:51 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2019-07-18 12:13:08 -0700 |
| commit | b5ea9c9337007d6e700280c8a60b4e10d070fb53 (patch) | |
| tree | 0f9f3d57436322c2ad603bcc07061246ffbc2f85 /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | |
| parent | bdae33b8b82bb379a5b11040b0b37df25c7871c9 (diff) | |
drm/i915/vbt: Fix VBT parsing for the PSR section
A single 32-bit PSR2 training pattern field follows the sixteen element
array of PSR table entries in the VBT spec. But, we incorrectly define
this PSR2 field for each of the PSR table entries. As a result, the PSR1
training pattern duration for any panel_type != 0 will be parsed
incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb
version >= 226 will also be wrong.
Cc: Rodrigo Vivi <[email protected]>
Cc: José Roberto de Souza <[email protected]>
Cc: [email protected]
Cc: [email protected] #v5.2
Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Reviewed-by: José Roberto de Souza <[email protected]>
Acked-by: Rodrigo Vivi <[email protected]>
Tested-by: François Guerraz <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c')
0 files changed, 0 insertions, 0 deletions