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authorSean Wang <[email protected]>2018-02-18 03:54:36 +0800
committerMatthias Brugger <[email protected]>2018-03-18 21:33:18 +0100
commit2c97fa22daa1f9bdbdebb9880f44a50c703a9d35 (patch)
treef6ae6027a875a9ceeb2fe5f85887e1d174887751 /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
parent2c002a3049f78733211b52e5e65137b292f0e8dd (diff)
dt-bindings: clock: mediatek: add missing required #reset-cells
All ethsys, pciesys and ssusbsys internally include reset controller, so explicitly add back these missing cell definitions to related bindings and examples. Signed-off-by: Sean Wang <[email protected]> Cc: Rob Herring <[email protected]> Cc: Michael Turquette <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: [email protected] Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Matthias Brugger <[email protected]> Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Matthias Brugger <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c')
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