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author | Aric Cyr <aric.cyr@amd.com> | 2023-04-30 15:54:14 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-09 09:36:27 -0400 |
commit | aaa07c0d08a37bf72cd73a3119ff99dc2bfece74 (patch) | |
tree | 1f67d05a9da1bea5d102d41d758e0943dc90342e /drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | |
parent | 4994d1f0a754cded0afb62c4753d00760ddca511 (diff) |
drm/amd/display: Promote DAL to 3.2.235
This version brings along following fixes:
- Block SubVP on displays that have pixclk > 1800Mhz
- Block SubVP high refresh when VRR active fixed
- Enforce 60us prefetch for 200Mhz DCFCLK modes
- Check Vactive for VRR active for FPO + Vactive
- Add symclk workaround during disable link output
- Show the DCN/DCE version in the log
- Add additional pstate registers to HW state query
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c')
0 files changed, 0 insertions, 0 deletions