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authorDave Airlie <airlied@redhat.com>2016-07-08 13:42:41 +1000
committerDave Airlie <airlied@redhat.com>2016-07-08 13:42:41 +1000
commit6f6e68b383314ab10189f983fead55437c149f32 (patch)
treea9254f00bb2053aa567981c8979c9713d648346c /drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
parentb33e07731c13f2a9ec5c345b8542cae5adf74235 (diff)
parentb1814a1def0564a2a1d3be7fa5bf7243ff899a28 (diff)
Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the main 4.8 pull for radeon and amdgpu. Sorry for the delay, I meant to send this out last week, but I was moving house. Lots of changes here: - ATPX improvements for better dGPU power control on PX systems - New power features for CZ/BR/ST - Pipelined BO moves and evictions in TTM - GPU scheduler improvements - GPU reset improvements - Overclocking on dGPUs with amdgpu - Lots of code cleanup - Bug fixes * 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (191 commits) drm/amd/powerplay: don't add invalid voltage. drm/amdgpu: add read/write function for GC CAC programming drm/amd/powerplay: add definitions related to di/dt feature for fiji and polaris. drm/amd/powerplay: add shared definitions for di/dt feature. drm/amdgpu: remove gfx8 registers that vary between asics drm/amd/powerplay: add mvdd dpm support. drm/amdgpu: get number of shade engine by cgs interface. drm/amdgpu: remove more of the ring backup code drm/amd/powerplay: Unify family defines drm/amdgpu: clean up ring_backup code, no need more drm/amdgpu: ib test first after gpu reset drm/amdgpu: recovery hw jobs when gpu reset V3 drm/amdgpu: abstract amdgpu_vm_is_gpu_reset drm/amdgpu: add a bool to specify if needing vm flush V2 drm/amdgpu: add amd_sched_job_recovery drm/amdgpu: force completion for gpu reset drm/amdgpu: block ttm first before parking scheduler drm/amd: add amd_sched_hw_job_reset drm/amd: add parent for sched fence drm/amdgpu: remove evict vram ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c90
1 files changed, 24 insertions, 66 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index 34a92808bbd4..5c8d3022fb87 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -223,13 +223,16 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
}
/**
- * amdgpu_sync_is_idle - test if all fences are signaled
+ * amdgpu_sync_peek_fence - get the next fence not signaled yet
*
* @sync: the sync object
+ * @ring: optional ring to use for test
*
- * Returns true if all fences in the sync object are signaled.
+ * Returns the next fence not signaled yet without removing it from the sync
+ * object.
*/
-bool amdgpu_sync_is_idle(struct amdgpu_sync *sync)
+struct fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
+ struct amdgpu_ring *ring)
{
struct amdgpu_sync_entry *e;
struct hlist_node *tmp;
@@ -237,6 +240,19 @@ bool amdgpu_sync_is_idle(struct amdgpu_sync *sync)
hash_for_each_safe(sync->fences, i, tmp, e, node) {
struct fence *f = e->fence;
+ struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
+
+ if (ring && s_fence) {
+ /* For fences from the same ring it is sufficient
+ * when they are scheduled.
+ */
+ if (s_fence->sched == &ring->sched) {
+ if (fence_is_signaled(&s_fence->scheduled))
+ continue;
+
+ return &s_fence->scheduled;
+ }
+ }
if (fence_is_signaled(f)) {
hash_del(&e->node);
@@ -245,58 +261,19 @@ bool amdgpu_sync_is_idle(struct amdgpu_sync *sync)
continue;
}
- return false;
+ return f;
}
- return true;
+ return NULL;
}
/**
- * amdgpu_sync_cycle_fences - move fences from one sync object into another
+ * amdgpu_sync_get_fence - get the next fence from the sync object
*
- * @dst: the destination sync object
- * @src: the source sync object
- * @fence: fence to add to source
+ * @sync: sync object to use
*
- * Remove all fences from source and put them into destination and add
- * fence as new one into source.
+ * Get and removes the next fence from the sync object not signaled yet.
*/
-int amdgpu_sync_cycle_fences(struct amdgpu_sync *dst, struct amdgpu_sync *src,
- struct fence *fence)
-{
- struct amdgpu_sync_entry *e, *newone;
- struct hlist_node *tmp;
- int i;
-
- /* Allocate the new entry before moving the old ones */
- newone = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
- if (!newone)
- return -ENOMEM;
-
- hash_for_each_safe(src->fences, i, tmp, e, node) {
- struct fence *f = e->fence;
-
- hash_del(&e->node);
- if (fence_is_signaled(f)) {
- fence_put(f);
- kmem_cache_free(amdgpu_sync_slab, e);
- continue;
- }
-
- if (amdgpu_sync_add_later(dst, f)) {
- kmem_cache_free(amdgpu_sync_slab, e);
- continue;
- }
-
- hash_add(dst->fences, &e->node, f->context);
- }
-
- hash_add(src->fences, &newone->node, fence->context);
- newone->fence = fence_get(fence);
-
- return 0;
-}
-
struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
{
struct amdgpu_sync_entry *e;
@@ -319,25 +296,6 @@ struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
return NULL;
}
-int amdgpu_sync_wait(struct amdgpu_sync *sync)
-{
- struct amdgpu_sync_entry *e;
- struct hlist_node *tmp;
- int i, r;
-
- hash_for_each_safe(sync->fences, i, tmp, e, node) {
- r = fence_wait(e->fence, false);
- if (r)
- return r;
-
- hash_del(&e->node);
- fence_put(e->fence);
- kmem_cache_free(amdgpu_sync_slab, e);
- }
-
- return 0;
-}
-
/**
* amdgpu_sync_free - free the sync object
*