irqchip/GICv2m: Fix GICv2m build warning on 32 bits

After GICv2m was enabled for 32-bit ARM kernel, a warning popped up:

drivers/irqchip/irq-gic-v2m.c: In function gicv2m_compose_msi_msg:
drivers/irqchip/irq-gic-v2m.c:100:2: warning: right shift count >= width
of type [enabled by default]
  msg->address_hi = (u32) (addr >> 32);
  ^

This patch fixes it by using proper macros for splitting up the value.

Signed-off-by: Pavel Fedin <[email protected]>
Reviewed-by: Marc Zyngier <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Cc: [email protected]
Cc: Stuart Yoder <[email protected]>
Cc: Jason Cooper <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Thomas Gleixner <[email protected]>

0 files changed, 0 insertions, 0 deletions