diff options
| author | Takashi Iwai <[email protected]> | 2019-09-14 17:24:57 +0200 |
|---|---|---|
| committer | Takashi Iwai <[email protected]> | 2019-09-14 17:26:10 +0200 |
| commit | d3f9990f1b48514b33342612b51fad238592d774 (patch) | |
| tree | 9ad5ae81ba3e820e91a09e2675b7c98675bd809e /drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | |
| parent | e1a00b5b253a4f97216b9a33199a863987075162 (diff) | |
| parent | 7711fb7dac1ab77fd1b4d948f4647a569e4a1ae2 (diff) | |
Merge branch 'for-next' into for-linus
Signed-off-by: Takashi Iwai <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index d7fae2676269..4410c97ac9b7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -29,8 +29,8 @@ #include <drm/drm_print.h> /* max number of rings */ -#define AMDGPU_MAX_RINGS 23 -#define AMDGPU_MAX_GFX_RINGS 1 +#define AMDGPU_MAX_RINGS 24 +#define AMDGPU_MAX_GFX_RINGS 2 #define AMDGPU_MAX_COMPUTE_RINGS 8 #define AMDGPU_MAX_VCE_RINGS 3 #define AMDGPU_MAX_UVD_ENC_RINGS 2 @@ -114,6 +114,7 @@ struct amdgpu_ring_funcs { uint32_t align_mask; u32 nop; bool support_64bit_ptrs; + bool no_user_fence; unsigned vmhub; unsigned extra_dw; @@ -171,6 +172,7 @@ struct amdgpu_ring_funcs { enum drm_sched_priority priority); /* Try to soft recover the ring to make the fence signal */ void (*soft_recovery)(struct amdgpu_ring *ring, unsigned vmid); + int (*preempt_ib)(struct amdgpu_ring *ring); }; struct amdgpu_ring { @@ -205,6 +207,10 @@ struct amdgpu_ring { unsigned fence_offs; uint64_t current_ctx; char name[16]; + u32 trail_seq; + unsigned trail_fence_offs; + u64 trail_fence_gpu_addr; + volatile u32 *trail_fence_cpu_addr; unsigned cond_exe_offs; u64 cond_exe_gpu_addr; volatile u32 *cond_exe_cpu_addr; @@ -245,6 +251,7 @@ struct amdgpu_ring { #define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib))) #define amdgpu_ring_init_cond_exec(r) (r)->funcs->init_cond_exec((r)) #define amdgpu_ring_patch_cond_exec(r,o) (r)->funcs->patch_cond_exec((r),(o)) +#define amdgpu_ring_preempt_ib(r) (r)->funcs->preempt_ib(r) int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw); void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count); @@ -265,6 +272,12 @@ void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring, bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid, struct dma_fence *fence); +static inline void amdgpu_ring_set_preempt_cond_exec(struct amdgpu_ring *ring, + bool cond_exec) +{ + *ring->cond_exe_cpu_addr = cond_exec; +} + static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring) { int i = 0; |