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author | Wenjing Liu <wenjing.liu@amd.com> | 2021-12-13 18:29:27 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-01-07 17:21:20 -0500 |
commit | 580013b2cef8babc204b7b78ff093140e112b194 (patch) | |
tree | 8cdf0e74e3cd8fa3db7cf05162d23129c6fff466 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
parent | 771ced73fccd0ac19bb956eaacce3669cfccc805 (diff) |
drm/amd/display: unhard code link to phy idx mapping in dc link and clean up
[why]
1. Current code hard codes link to PHY mapping in dc link level per asic
per revision.
This is not scalable. In long term the mapping will be obatined from
DMUB and store in dc resource.
2. Depending on DCN revision and endpoint type, the definition of
dio_output_idx dio_output_type and phy_idx are not consistent. We need
to unify the meaning of these hardware indices across different system
configuration.
[how]
1. Temporarly move the hardcoded mapping to dc_resource level, which
should have full awareness of asic specific configuration and add a TODO
comment to move the mapping to DMUB.
2. populate dio_output_idx/phy_idx for all configuration, define
usb4_enabled bit instead of dio_output_type as an external enum.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions