diff options
| author | Bibby Hsieh <bibby.hsieh@mediatek.com> | 2019-12-10 13:05:26 +0800 |
|---|---|---|
| committer | CK Hu <ck.hu@mediatek.com> | 2020-01-09 09:39:08 +0800 |
| commit | 2f965be7f90083f7cfd57c49f74a7f341de335a9 (patch) | |
| tree | e6e104f0fe68991ab763106c981a96f7e970bb2c /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | d0afe37f5209c7b51a5646ffef578b9d9b383d90 (diff) | |
drm/mediatek: apply CMDQ control flow
In some Mediatek SoC, there is no "shadow"
registers for performaing an atomic video mode
set or page flip at vblank/vsync.
The CMDQ (Commend Queue) is used to help
update all relevant display controller registers
with critical time limation.
Signed-off-by: YT Shen <yt.shen@mediatek.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions