diff options
| author | Mahesh Kumar <mahesh1.kumar@intel.com> | 2018-02-15 15:26:41 +0530 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-02-28 11:10:37 -0800 |
| commit | 1b0008450f23632b029e9fde9a71be90f119ec35 (patch) | |
| tree | 1042582df2093cc799a897ee2d33b7e365f08629 /drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | |
| parent | 72a6d72c2cd03bba7b70117b63dea83d2de88057 (diff) | |
drm/i915/cnl: Fix PORT_TX_DW5/7 register address
Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is
defining it as 0x162ED4. Similarly for CNL_PORT_DW7_LN0_D register address
is defined 0x162EDC instead of 0x162E5C, fix it.
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Fixes: 04416108ccea ("drm/i915/cnl: Add registers related to voltage swing sequences.")
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180215095643.3844-2-mahesh1.kumar@intel.com
(cherry picked from commit e103962611b2d464be6ab596d7b3495fe7b4c132)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c')
0 files changed, 0 insertions, 0 deletions