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| author | Alvin Lee <Alvin.Lee2@amd.com> | 2022-11-19 11:42:41 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-11-29 11:03:38 -0500 |
| commit | f6015da7f2410109bd2ccd2e2828f26185aeb81d (patch) | |
| tree | 6336377699b432b0ba4cb7898a7794064102ab3f /drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | |
| parent | 7a259c6df9010fb9508dcbf34a3f5f16993ca37b (diff) | |
drm/amd/display: Fix DTBCLK disable requests and SRC_SEL programming
[Description]
- When transitioning FRL / DP2 is not required, we will always request
DTBCLK = 0Mhz, but PMFW returns the min freq
- This causes us to make DTBCLK requests every time we call optimize
after transitioning from FRL to non-FRL
- If DTBCLK is not required, request the min instead (then we only need
to make 1 extra request at boot time)
- Also when programming PIPE_DTO_SRC_SEL, don't programming for DP
first, just programming once for the required selection (programming
DP on an HDMI connection then switching back causes corruption)
Reviewed-by: Dillon Varone <Dillon.Varone@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c')
0 files changed, 0 insertions, 0 deletions