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authorMasahiro Yamada <[email protected]>2016-01-23 17:55:30 +0900
committerThierry Reding <[email protected]>2016-04-12 17:09:28 +0200
commit955d809bdeaea3663cf6ac1ee72cd50775bbab9d (patch)
tree8cc239724e40264746c379065f322ffa7a50d482 /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
parentf55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff)
ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select
These two are both ARMv7 SoCs. They need not explicitly select ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7. Refer to commit a092f2b15399 ("ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs"). Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
0 files changed, 0 insertions, 0 deletions