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| author | Hamza Mahfooz <hamza.mahfooz@amd.com> | 2024-06-03 10:16:45 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-06-14 16:15:59 -0400 |
| commit | 02593249fa11ef8d2ca780ef91962f81b04eeea0 (patch) | |
| tree | 2a9667c72e21a9dd0654394546ccb3daf0f55b4b /drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | |
| parent | 1bfe5e77468d2a73de7411024912ee2a422c6d4c (diff) | |
drm/amd/display: prevent register access while in IPS
We can't read/write to DCN registers while in IPS. Since, that can cause
the system to hang. So, before proceeding with the access in that
scenario, force the system out of IPS.
Cc: stable@vger.kernel.org # 6.6+
Reviewed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c')
0 files changed, 0 insertions, 0 deletions