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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2023-09-29 08:38:54 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-10-05 13:45:22 +0200 |
| commit | 01eabef547e63d80086acd3f247d36c5f9f92456 (patch) | |
| tree | 4e1a3ace3cf93fa0e9bb7c6f13ff04f0b32d00e4 /drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c | |
| parent | 5f710e3bc5987373737470f98798bbd49134a2e0 (diff) | |
clk: renesas: rzg2l: Add support for RZ/G3S PLL
Add support for reading the frequency of PLL1/4/6 as available on
RZ/G3S. The computation formula for the PLL frequency is as follows:
Fout = (nir + nfr / 4096) * Fin / (mr * pr)
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-8-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c')
0 files changed, 0 insertions, 0 deletions