Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next

This is the main 4.8 pull for radeon and amdgpu.  Sorry for the delay,
I meant to send this out last week, but I was moving house.  Lots of
changes here:
- ATPX improvements for better dGPU power control on PX systems
- New power features for CZ/BR/ST
- Pipelined BO moves and evictions in TTM
- GPU scheduler improvements
- GPU reset improvements
- Overclocking on dGPUs with amdgpu
- Lots of code cleanup
- Bug fixes

* 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (191 commits)
  drm/amd/powerplay: don't add invalid voltage.
  drm/amdgpu: add read/write function for GC CAC programming
  drm/amd/powerplay: add definitions related to di/dt feature for fiji and polaris.
  drm/amd/powerplay: add shared definitions for di/dt feature.
  drm/amdgpu: remove gfx8 registers that vary between asics
  drm/amd/powerplay: add mvdd dpm support.
  drm/amdgpu: get number of shade engine by cgs interface.
  drm/amdgpu: remove more of the ring backup code
  drm/amd/powerplay:  Unify family defines
  drm/amdgpu: clean up ring_backup code, no need more
  drm/amdgpu: ib test first after gpu reset
  drm/amdgpu: recovery hw jobs when gpu reset V3
  drm/amdgpu: abstract amdgpu_vm_is_gpu_reset
  drm/amdgpu: add a bool to specify if needing vm flush V2
  drm/amdgpu: add amd_sched_job_recovery
  drm/amdgpu: force completion for gpu reset
  drm/amdgpu: block ttm first before parking scheduler
  drm/amd: add amd_sched_hw_job_reset
  drm/amd: add parent for sched fence
  drm/amdgpu: remove evict vram
  ...

1 files changed, 3 insertions, 9 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 34e35423b78e..46c3097c5224 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -160,10 +160,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 		patch_offset = amdgpu_ring_init_cond_exec(ring);
 
 	if (vm) {
-		r = amdgpu_vm_flush(ring, job->vm_id, job->vm_pd_addr,
-				    job->gds_base, job->gds_size,
-				    job->gws_base, job->gws_size,
-				    job->oa_base, job->oa_size);
+		r = amdgpu_vm_flush(ring, job);
 		if (r) {
 			amdgpu_ring_undo(ring);
 			return r;
@@ -203,11 +200,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 	}
 
 	/* wrap the last IB with fence */
-	if (job && job->uf_bo) {
-		uint64_t addr = amdgpu_bo_gpu_offset(job->uf_bo);
-
-		addr += job->uf_offset;
-		amdgpu_ring_emit_fence(ring, addr, job->uf_sequence,
+	if (job && job->uf_addr) {
+		amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence,
 				       AMDGPU_FENCE_FLAG_64BIT);
 	}