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| author | Krunoslav Kovac <krunoslav.kovac@amd.com> | 2023-11-01 15:59:56 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-17 09:30:50 -0500 |
| commit | c21a764a98cb59d673cad3da64f35f4dec951951 (patch) | |
| tree | e2aa1bddfcde1b3fa72177be5d7874ea6deb0304 /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |
| parent | cc6201b773f12388c234aa10145322ccc429959e (diff) | |
drm/amd/display: Send PQ bit in AMD VSIF
[WHY & HOW]
PB9 bit 5 was added to signal PQ EOTF in AMD vendor specific infoframe.
This change sets it when appropriate.
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Krunoslav Kovac <krunoslav.kovac@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
0 files changed, 0 insertions, 0 deletions