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| author | Dave Airlie <airlied@redhat.com> | 2017-10-20 10:47:19 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2017-10-20 10:47:19 +1000 |
| commit | 6585d4274b0baf1d09318539c4a726a96b51af34 (patch) | |
| tree | 179aacc9409db45966595893ae4842104b314442 /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |
| parent | 40d86701a625eed9e644281b9af228d6a52d8ed9 (diff) | |
| parent | 96687ec0bb478088cb6941a7dca3bb6808a19313 (diff) | |
Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next
Last set of features for 4.15. Highlights:
- Add a bo flag to allow buffers to opt out of implicit sync
- Add ctx priority setting interface
- Lots more powerplay cleanups
- Start to plumb through vram lost infrastructure for gpu reset
- ttm support for huge pages
- misc cleanups and bug fixes
* 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (73 commits)
drm/amd/powerplay: Place the constant on the right side of the test
drm/amd/powerplay: Remove useless variable
drm/amd/powerplay: Don't cast kzalloc() return value
drm/amdgpu: allow GTT overcommit during bind
drm/amdgpu: linear validate first then bind to GART
drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table.
drm/amd/pp: thermal control not enabled on vega10.
drm/amdgpu: busywait KIQ register accessing (v4)
drm/amdgpu: report more amdgpu_fence_info
drm/amdgpu:don't check soft_reset for sriov
drm/amdgpu:fix duplicated setting job's vram_lost
drm/amdgpu:reduce wb to 512 slot
drm/amdgpu: fix regresstion on SR-IOV gpu reset failed
drm/amd/powerplay: Tidy up cz_dpm_powerup_vce()
drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce()
drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm()
drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm()
drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd()
drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd()
drm/amd/powerplay: Tidy up cz_start_dpm()
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 333bad749067..fb9f88ef6059 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c @@ -169,6 +169,32 @@ int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f) } /** + * amdgpu_fence_emit_polling - emit a fence on the requeste ring + * + * @ring: ring the fence is associated with + * @s: resulting sequence number + * + * Emits a fence command on the requested ring (all asics). + * Used For polling fence. + * Returns 0 on success, -ENOMEM on failure. + */ +int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s) +{ + uint32_t seq; + + if (!s) + return -EINVAL; + + seq = ++ring->fence_drv.sync_seq; + amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, + seq, AMDGPU_FENCE_FLAG_INT); + + *s = seq; + + return 0; +} + +/** * amdgpu_fence_schedule_fallback - schedule fallback check * * @ring: pointer to struct amdgpu_ring @@ -282,6 +308,30 @@ int amdgpu_fence_wait_empty(struct amdgpu_ring *ring) } /** + * amdgpu_fence_wait_polling - busy wait for givn sequence number + * + * @ring: ring index the fence is associated with + * @wait_seq: sequence number to wait + * @timeout: the timeout for waiting in usecs + * + * Wait for all fences on the requested ring to signal (all asics). + * Returns left time if no timeout, 0 or minus if timeout. + */ +signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring, + uint32_t wait_seq, + signed long timeout) +{ + uint32_t seq; + + do { + seq = amdgpu_fence_read(ring); + udelay(5); + timeout -= 5; + } while ((int32_t)(wait_seq - seq) > 0 && timeout > 0); + + return timeout > 0 ? timeout : 0; +} +/** * amdgpu_fence_count_emitted - get the count of emitted fences * * @ring: ring the fence is associated with @@ -641,6 +691,19 @@ static int amdgpu_debugfs_fence_info(struct seq_file *m, void *data) atomic_read(&ring->fence_drv.last_seq)); seq_printf(m, "Last emitted 0x%08x\n", ring->fence_drv.sync_seq); + + if (ring->funcs->type != AMDGPU_RING_TYPE_GFX) + continue; + + /* set in CP_VMID_PREEMPT and preemption occurred */ + seq_printf(m, "Last preempted 0x%08x\n", + le32_to_cpu(*(ring->fence_drv.cpu_addr + 2))); + /* set in CP_VMID_RESET and reset occurred */ + seq_printf(m, "Last reset 0x%08x\n", + le32_to_cpu(*(ring->fence_drv.cpu_addr + 4))); + /* Both preemption and reset occurred */ + seq_printf(m, "Last both 0x%08x\n", + le32_to_cpu(*(ring->fence_drv.cpu_addr + 6))); } return 0; } |