diff options
| author | Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> | 2018-09-05 10:49:37 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2018-09-05 12:39:57 +0100 |
| commit | 31a5fae4c5a009898da6d177901d5328051641ff (patch) | |
| tree | d080addcb71d9096e1d8d808278d685f0c109dda /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |
| parent | ffa69d6a16f686efe45269342474e421f2aa58b2 (diff) | |
spi: sh-msiof: Fix handling of write value for SISTR register
This patch changes writing to the SISTR register according to the H/W
user's manual.
The TDREQ bit and RDREQ bits of SISTR are read-only, and must be written
their initial values of zero.
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
[geert: reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
0 files changed, 0 insertions, 0 deletions