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authorEmil Renner Berthing <kernel@esmil.dk>2022-06-27 11:09:39 +0200
committerVinod Koul <vkoul@kernel.org>2022-07-01 17:18:26 +0530
commit49db68d45bdcad06e28a420d5d911e4178389666 (patch)
treefc26fb66e03da4226b0326f13a2369ac20e61660 /drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
parent44c4237cf3436bda2b185ff728123651ad133f69 (diff)
dmaengine: dw-axi-dmac: Fix RMW on channel suspend register
When the DMA is configured for more than 8 channels the bits controlling suspend moves to another register. However when adding support for this the new register would be completely overwritten in one case and overwritten with values from the old register in another case. Found by comparing the parallel implementation of more than 8 channel support for the StarFive JH7100 SoC by Samin. Fixes: 824351668a41 ("dmaengine: dw-axi-dmac: support DMAX_NUM_CHANNELS > 8") Co-developed-by: Samin Guo <samin.guo@starfivetech.com> Signed-off-by: Samin Guo <samin.guo@starfivetech.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220627090939.1775717-1-emil.renner.berthing@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_display.c')
0 files changed, 0 insertions, 0 deletions