diff options
| author | Bruno Meirelles Herrera <bmh@certi.org.br> | 2018-08-27 18:36:38 -0300 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2018-09-05 13:12:31 +0300 |
| commit | d9707490077bee0c7060ef5665a90656e1078b66 (patch) | |
| tree | 7be07bf74b9834eb2291d1f52221fdc79f988dda /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
| parent | b497fff6f59ec4ab2816439e7ab976a90b7bab5c (diff) | |
usb: dwc2: Fix call location of dwc2_check_core_endianness
Some SoC/IP as STM32F469, the snpsid can only be read after clock is
enabled, otherwise it will read as 0, and the dwc2_check_core_endianness
will assume the core and AHB have opposite endianness, leading to the
following error:
[ 1.976339] dwc2 50000000.usb: 50000000.usb supply vusb_d not found, using dummy regulator
[ 1.986124] dwc2 50000000.usb: Linked as a consumer to regulator.0
[ 1.992711] dwc2 50000000.usb: 50000000.usb supply vusb_a not found, using dummy regulator
[ 2.003672] dwc2 50000000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE
[ 2.015176] dwc2: probe of 50000000.usb failed with error -16
The proposed patch changes the location where dwc2_check_core_endianness
is called, allowing the clock peripheral to be enabled first.
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Bruno Meirelles Herrera <bmh@certi.org.br>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
0 files changed, 0 insertions, 0 deletions