diff options
| author | Conor Dooley <conor.dooley@microchip.com> | 2022-09-09 13:31:17 +0100 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-09-14 10:57:06 +0300 |
| commit | 14016e4aafc5f157c10fb1a386fa3b3bd9c30e9a (patch) | |
| tree | 71f504a30d6d2da09c88dd1e513fb7cc53398bba /drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | |
| parent | 356a5048e413241f9b4719254d7556f32cad845d (diff) | |
clk: microchip: mpfs: add MSS pll's set & round rate
The MSS pll is not a fixed frequency clock, so add set() & round_rate()
support.
Control is limited to a 7 bit output divider as other devices on the
FPGA occupy the other three outputs of the PLL & prevent changing
the multiplier.
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220909123123.2699583-9-conor.dooley@microchip.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c')
0 files changed, 0 insertions, 0 deletions