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authorMauro Carvalho Chehab <[email protected]>2016-10-05 16:42:36 -0300
committerMauro Carvalho Chehab <[email protected]>2016-10-05 16:43:53 -0300
commit9fce0c226536fc36c7fb0a80000ca38a995be43e (patch)
treed1d03d4a831bb143ffd401cefa0f44f636ac0084 /drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
parent3cc2691227203c00cac1d82d6b0772224d5c87b2 (diff)
parentc8d2bc9bc39ebea8437fd974fdbc21847bb897a3 (diff)
Merge tag 'v4.8' into patchwork
Linux 4.8 * tag 'v4.8': (1761 commits) Linux 4.8 ARM: 8618/1: decompressor: reset ttbcr fields to use TTBR0 on ARMv7 MIPS: CM: Fix mips_cm_max_vp_width for non-MT kernels on MT systems include/linux/property.h: fix typo/compile error ocfs2: fix deadlock on mmapped page in ocfs2_write_begin_nolock() mm: workingset: fix crash in shadow node shrinker caused by replace_page_cache_page() MAINTAINERS: Switch to kernel.org email address for Javi Merino x86/entry/64: Fix context tracking state warning when load_gs_index fails x86/boot: Initialize FPU and X86_FEATURE_ALWAYS even if we don't have CPUID x86/vdso: Fix building on big endian host x86/boot: Fix another __read_cr4() case on 486 sctp: fix the issue sctp_diag uses lock_sock in rcu_read_lock sctp: change to check peer prsctp_capable when using prsctp polices sctp: remove prsctp_param from sctp_chunk sctp: move sent_count to the memory hole in sctp_chunk tg3: Avoid NULL pointer dereference in tg3_io_error_detected() x86/init: Fix cr4_init_shadow() on CR4-less machines MIPS: Fix detection of unsupported highmem with cache aliases MIPS: Malta: Fix IOCU disable switch read for MIPS64 MIPS: Fix BUILD_ROLLBACK_PROLOGUE for microMIPS ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
index 49de92600074..10b5ddf2c588 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
@@ -200,16 +200,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
atpx->is_hybrid = false;
if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
printk("ATPX Hybrid Graphics\n");
-#if 1
- /* This is a temporary hack until the D3 cold support
- * makes it upstream. The ATPX power_control method seems
- * to still work on even if the system should be using
- * the new standardized hybrid D3 cold ACPI interface.
- */
- atpx->functions.power_cntl = true;
-#else
atpx->functions.power_cntl = false;
-#endif
atpx->is_hybrid = true;
}