diff options
| author | Dave Airlie <[email protected]> | 2021-08-11 14:15:26 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2021-08-11 14:15:27 +1000 |
| commit | 59b9d6baa1bea254d31042c42bcb8f946c263bae (patch) | |
| tree | b34cc41d9504ff1823e7d534e7ed833c16b55dd2 /drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | |
| parent | 9efba20291f2e816e9c043875bf4e1f0f1416c63 (diff) | |
| parent | a43e2a0e11491b73e2acaa27ee74d6c3b86deac0 (diff) | |
Merge tag 'amd-drm-next-5.15-2021-08-06' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.15-2021-08-06:
amdgpu:
- Aldebaran fixes
- Powergating fix for Renoir
- Switch virtual DCE over to vkms based atomic modesetting
- Misc typo fixes
- PSP handling cleanups
- DC FP cleanups
- RAS fixes
- Wave debug improvements
- Freesync fix
- BACO/BOCO fixes
- Misc fixes
amdkfd:
- Expose gfx version in sysfs
- Aldebaran fixes
radeon:
- Coding style fix
- Typo fixes
- Pageflip fix
UAPI:
- amdkfd: SVM address range query
Proposed userspace: https://github.com/RadeonOpenCompute/ROCR-Runtime/tree/memory_model_queries
Signed-off-by: Dave Airlie <[email protected]>
From: Alex Deucher <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c index 3b5d13189073..8f53837d4d3e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c @@ -468,6 +468,46 @@ bool amdgpu_atomfirmware_dynamic_boot_config_supported(struct amdgpu_device *ade return (fw_cap & ATOM_FIRMWARE_CAP_DYNAMIC_BOOT_CFG_ENABLE) ? true : false; } +/* + * Helper function to query RAS EEPROM address + * + * @adev: amdgpu_device pointer + * + * Return true if vbios supports ras rom address reporting + */ +bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address) +{ + struct amdgpu_mode_info *mode_info = &adev->mode_info; + int index; + u16 data_offset, size; + union firmware_info *firmware_info; + u8 frev, crev; + + if (i2c_address == NULL) + return false; + + *i2c_address = 0; + + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, + firmwareinfo); + + if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, + index, &size, &frev, &crev, &data_offset)) { + /* support firmware_info 3.4 + */ + if ((frev == 3 && crev >=4) || (frev > 3)) { + firmware_info = (union firmware_info *) + (mode_info->atom_context->bios + data_offset); + *i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr; + } + } + + if (*i2c_address != 0) + return true; + + return false; +} + + union smu_info { struct atom_smu_info_v3_1 v31; }; |