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authorChris Wilson <chris@chris-wilson.co.uk>2018-05-11 13:11:47 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2018-05-14 09:40:58 +0100
commit4db518e4e8286ca93bd5399f26549eafc87607ea (patch)
treebcd74f9e510a8a5b982bf53f4816d982e8bbbecd /drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
parentb1705f729dc7c7cdeeef712272b13886b2904ad0 (diff)
drm/i915/execlists: Relax CSB force-mmio for VT-d
The original switch to use CSB from the HWSP was plagued by the effect of read ordering on VT-d; we would read the WRITE pointer from the HWSP before it had completed writing the CSB contents. The mystery comes down to the lack of rmb() for correct ordering with respect to the writes from HW, and with that resolved we can remove the VT-d special casing. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: MichaƂ Winiarski <michal.winiarski@intel.com> Cc: Michel Thierry <michel.thierry@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180511121147.31915-3-chris@chris-wilson.co.uk Tested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c')
0 files changed, 0 insertions, 0 deletions