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authorChristian König <christian.koenig@amd.com>2015-07-21 18:02:21 +0200
committerAlex Deucher <alexander.deucher@amd.com>2015-08-17 16:50:18 -0400
commit5430a3ffb0b1902e8aea4ed2ba256b1263126e8d (patch)
treec73e8f31dc1ef2f698c5f16fb8bc2c8e4d047b12 /drivers/gpu/drm/amd/amdgpu/amdgpu.h
parent5ceb54c68a28fc8af5cf8d32c4fde29c97dd3c18 (diff)
drm/amdgpu: fix UVD/VCE fence handling
We need to return the sequence number to userspace even when we don't use user fences. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 551143287698..e6c26c1716b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -414,8 +414,6 @@ struct amdgpu_user_fence {
struct amdgpu_bo *bo;
/* write-back address offset to bo start */
uint32_t offset;
- /* resulting sequence number */
- uint64_t sequence;
};
int amdgpu_fence_driver_init(struct amdgpu_device *adev);
@@ -847,6 +845,8 @@ struct amdgpu_ib {
uint32_t gws_base, gws_size;
uint32_t oa_base, oa_size;
uint32_t flags;
+ /* resulting sequence number */
+ uint64_t sequence;
};
enum amdgpu_ring_type {