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| author | Yan Zhao <yan.y.zhao@intel.com> | 2023-07-31 19:20:33 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2023-08-01 11:21:09 +0800 |
| commit | 46d14e17095237007b59f56aae2d81ae2dcb0f93 (patch) | |
| tree | c736f2f4a17d2fced4e20828650c902a05ea0e81 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
| parent | e354f67733115b4453268f61e6e072e9b1ea7a2f (diff) | |
drm/i915/gvt: Fix bug in getting msg length in AUX CH registers handler
Msg length should be obtained from value written to AUX_CH_CTL register
rather than from enum type of the register.
Commit 0cad796a2269 ("drm/i915: Use REG_BIT() & co. for AUX CH registers")
incorrectly calculates the msg_length from reg type and yields below
warning in intel_gvt_i2c_handle_aux_ch_write():
"i915 0000:00:02.0: drm_WARN_ON(msg_length != 4)".
Fixes: 0cad796a2269 ("drm/i915: Use REG_BIT() & co. for AUX CH registers")
Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20230731112033.7275-1-yan.y.zhao@intel.com
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
0 files changed, 0 insertions, 0 deletions