diff options
author | Rafał Miłecki <[email protected]> | 2018-07-27 13:13:39 +0200 |
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committer | Paul Burton <[email protected]> | 2018-07-27 10:07:32 -0700 |
commit | d5ea019f8a381f88545bb26993b62ec24a2796b7 (patch) | |
tree | 5e06f16aa8e1bb9f60bab49f2d2db27f496eeccc /drivers/fpga | |
parent | d72e90f33aa4709ebecc5005562f52335e106a60 (diff) |
Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum"
This reverts commit 2a027b47dba6 ("MIPS: BCM47XX: Enable 74K Core
ExternalSync for PCIe erratum").
Enabling ExternalSync caused a regression for BCM4718A1 (used e.g. in
Netgear E3000 and ASUS RT-N16): it simply hangs during PCIe
initialization. It's likely that BCM4717A1 is also affected.
I didn't notice that earlier as the only BCM47XX devices with PCIe I
own are:
1) BCM4706 with 2 x 14e4:4331
2) BCM4706 with 14e4:4360 and 14e4:4331
it appears that BCM4706 is unaffected.
While BCM5300X-ES300-RDS.pdf seems to document that erratum and its
workarounds (according to quotes provided by Tokunori) it seems not even
Broadcom follows them.
According to the provided info Broadcom should define CONF7_ES in their
SDK's mipsinc.h and implement workaround in the si_mips_init(). Checking
both didn't reveal such code. It *could* mean Broadcom also had some
problems with the given workaround.
Signed-off-by: Rafał Miłecki <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Reported-by: Michael Marley <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/20032/
URL: https://bugs.openwrt.org/index.php?do=details&task_id=1688
Cc: Tokunori Ikegami <[email protected]>
Cc: Hauke Mehrtens <[email protected]>
Cc: Chris Packham <[email protected]>
Cc: James Hogan <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: [email protected]
Diffstat (limited to 'drivers/fpga')
0 files changed, 0 insertions, 0 deletions