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authorMarek Vasut <[email protected]>2018-12-15 01:55:19 +0100
committerStephen Boyd <[email protected]>2019-01-09 10:53:58 -0800
commit2137a109a5e39c2bdccfffe65230ed3fadbaac0e (patch)
tree46f69d35292d3d4214f9c7643b85e77cedad1bc1 /drivers/fpga
parentc6e909972ef87aa2a479269f46b84126f99ec6db (diff)
clk: vc5: Abort clock configuration without upstream clock
In case the upstream clock are not set, which can happen in case the VC5 has no valid upstream clock, the $src variable is used uninited by regmap_update_bits(). Check for this condition and return -EINVAL in such case. Note that in case the VC5 has no valid upstream clock, the VC5 can not operate correctly. That is a hardware property of the VC5. The internal oscilator present in some VC5 models is also considered upstream clock. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexey Firago <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: [email protected] [[email protected]: Added comment about probe preventing this from happening in the first place] Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'drivers/fpga')
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