diff options
| author | Clinton Taylor <Clinton.A.Taylor@intel.com> | 2021-05-11 21:21:43 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2021-05-12 16:56:56 -0700 |
| commit | 83c81a0a16e54603bc3812e224620d6015b05836 (patch) | |
| tree | e7fd172cd1504420c2aeb7b11db0c0d4bcb6fc7d /drivers/fpga/xilinx-spi.c | |
| parent | 0e53fb847c6bba5b92fb80060a63d4c23d032822 (diff) | |
drm/i915/adl_p: Add PCH support
Add ADP-P PCH device ID and assign as ADL PCH if found. Previously we
would assign the DDC pin map based on the PCH, but it can also change
based on the CPU. From Bspec 20124: "The physical port to pin pair
mapping are defined in the Bspec per PCH. Mapping can further change
based on CPU Si used as CPU and PCH can be mixed and matched".
Bspec: 20124
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210512042144.2089071-7-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/fpga/xilinx-spi.c')
0 files changed, 0 insertions, 0 deletions