diff options
| author | Eric Chanudet <[email protected]> | 2023-08-09 16:32:33 -0400 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-08-10 07:21:57 -0700 |
| commit | e85cbb34f3eabc27d6e77cfde6c9afbab3d70b4b (patch) | |
| tree | 87281a379c91b9cbf929888bcc6632652ed21b2b /drivers/fpga/xilinx-selectmap.c | |
| parent | 605a981e53dc226f0b654b3aa74c303e5ca7c051 (diff) | |
arm64: dts: qcom: sa8540p-ride: enable rtc
SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/[email protected]/
Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
commit e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc")
On SA8540P-ride, the register bank SDAM6 of the first PMIC is not
writable. Following recommendations provided during the review, use
SDAM2 from the second PMIC at offset 0xa0 instead.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Eric Chanudet <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
Diffstat (limited to 'drivers/fpga/xilinx-selectmap.c')
0 files changed, 0 insertions, 0 deletions