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authorVignesh Raghavendra <[email protected]>2023-03-20 10:19:35 +0530
committerNishanth Menon <[email protected]>2023-03-20 12:34:25 -0500
commit438b8dc949bf45979c32553e96086ff1c6e2504e (patch)
tree148e605ae682298a76f58c71395fb77aceae0bd4 /drivers/fpga/xilinx-selectmap.c
parent6974371cab1c488a53960945cb139b20ebb5f16b (diff)
arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB
Per AM62Ax SoC datasheet[0] L2 cache is 512KB. [0] https://www.ti.com/lit/gpn/am62a7 Page 1. Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs") Signed-off-by: Vignesh Raghavendra <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nishanth Menon <[email protected]>
Diffstat (limited to 'drivers/fpga/xilinx-selectmap.c')
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