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| author | Yipeng Zou <zouyipeng@huawei.com> | 2024-07-30 09:44:00 +0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2024-07-30 20:59:12 +0200 |
| commit | 6be6cba9c4371d27f78d900ccfe34bb880d9ee20 (patch) | |
| tree | 9aea0f9ff90a92805640c51fdaf2d62f03029b45 /drivers/fpga/tests/fpga-mgr-test.c | |
| parent | f872d4af79fe8c71ae291ce8875b477e1669a6c7 (diff) | |
irqchip/mbigen: Fix mbigen node address layout
The mbigen interrupt chip has its per node registers located in a
contiguous region of page sized chunks. The code maps them into virtual
address space as a contiguous region and determines the address of a node
by using the node ID as index.
mbigen chip
|-----------------|------------|--------------|
mgn_node_0 mgn_node_1 ... mgn_node_i
|--------------| |--------------| |----------------------|
[0x0000, 0x0x0FFF] [0x1000, 0x1FFF] [i*0x1000, (i+1)*0x1000 - 1]
This works correctly up to 10 nodes, but then fails because the 11th's
array slot is used for the MGN_CLEAR registers.
mbigen chip
|-----------|--------|--------|---------------|--------|
mgn_node_0 mgn_node_1 ... mgn_clear_register ... mgn_node_i
|-----------------|
[0xA000, 0xAFFF]
Skip the MGN_CLEAR register space when calculating the offset for node IDs
greater than or equal to ten.
Fixes: a6c2f87b8820 ("irqchip/mbigen: Implement the mbigen irq chip operation functions")
Signed-off-by: Yipeng Zou <zouyipeng@huawei.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20240730014400.1751530-1-zouyipeng@huawei.com
Diffstat (limited to 'drivers/fpga/tests/fpga-mgr-test.c')
0 files changed, 0 insertions, 0 deletions