diff options
| author | Marek Vasut <[email protected]> | 2024-04-17 13:42:06 +0200 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2024-04-25 14:23:33 +0800 |
| commit | bc8a8c8c15075a8512ad25e16d3a022e81ee7985 (patch) | |
| tree | c2926317a225a50b4bcd0073f820361ba1f4102c /drivers/fpga/tests/fpga-bridge-test.c | |
| parent | 7f699ed1df872faf09a0978476e19c4a2fa7757a (diff) | |
arm64: dts: imx8mp: Align both CSI2 pixel clock
Configure both CSI2 clock-frequency and assigned-clock-rates
the same way. There does not seem to be any reason for keeping
the two CSI2 pixel clock set to different frequencies.
This also reduces first CSI2 clock from overdrive mode
frequency which is 500 MHz down below the regular mode
frequency of 400 MHz.
Reviewed-by: Alexander Stein <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Ahmad Fatoum <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
Diffstat (limited to 'drivers/fpga/tests/fpga-bridge-test.c')
0 files changed, 0 insertions, 0 deletions