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| author | Abel Vesa <abel.vesa@linaro.org> | 2023-12-07 14:19:15 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-12-21 22:37:39 +0530 |
| commit | 762c3565f3c8105603089eeaa0501e5089922221 (patch) | |
| tree | 1de7fb24dc9fd47c134ae5db5cceeb46b738d71c /drivers/fpga/microchip-spi.c | |
| parent | bc546cc85c1d92d9ba7b278b77016b7d4334fafa (diff) | |
phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets
There is a variant of V6 offsets that are different, the QMP PHY N4,
and it is found on the X1E80100 platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-6-dfd1c375ef61@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/fpga/microchip-spi.c')
0 files changed, 0 insertions, 0 deletions