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authorAlison Schofield <[email protected]>2022-11-30 14:47:25 -0800
committerDan Williams <[email protected]>2022-12-03 16:54:35 -0800
commitf9db85bfec0dcc01556a41d23aec47b866ab3569 (patch)
treef0f5c864740c56254d50998b10f72698297fc8f8 /drivers/fpga/fpga-mgr.c
parent7db0aa8cc019f4f926c19989d1c8696d3893d77c (diff)
cxl/acpi: Support CXL XOR Interleave Math (CXIMS)
When the CFMWS is using XOR math, parse the corresponding CXIMS structure and store the xormaps in the root decoder structure. Use the xormaps in a new lookup, cxl_hb_xor(), to find a targets entry in the host bridge interleave target list. Defined in CXL Specfication 3.0 Section: 9.17.1 Signed-off-by: Alison Schofield <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/5794813acdf7b67cfba3609c6aaff46932fa38d0.1669847017.git.alison.schofield@intel.com Signed-off-by: Dan Williams <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
0 files changed, 0 insertions, 0 deletions