diff options
author | Jiawen Wu <[email protected]> | 2023-07-19 17:22:33 +0800 |
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committer | David S. Miller <[email protected]> | 2023-07-23 11:47:07 +0100 |
commit | c7b75bea853daeb64fc831dbf39a6bbabcc402ac (patch) | |
tree | 3dea2dd6692a3b02ccecbf63d792c4449dfcc751 /drivers/fpga/fpga-mgr.c | |
parent | 32ad45b76990ece9c5dd1fe7aae6e688c3baa647 (diff) |
net: phy: marvell10g: fix 88x3310 power up
Clear MV_V2_PORT_CTRL_PWRDOWN bit to set power up for 88x3310 PHY,
it sometimes does not take effect immediately. And a read of this
register causes the bit not to clear. This will cause mv3310_reset()
to time out, which will fail the config initialization. So add a delay
before the next access.
Fixes: c9cc1c815d36 ("net: phy: marvell10g: place in powersave mode at probe")
Signed-off-by: Jiawen Wu <[email protected]>
Reviewed-by: Russell King (Oracle) <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
0 files changed, 0 insertions, 0 deletions