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authorTrevor Wu <[email protected]>2022-09-27 23:11:41 +0800
committerMark Brown <[email protected]>2022-09-28 12:30:48 +0100
commit7ba6546b547c75b0196029c7e0aaaab2eb6694a4 (patch)
tree7c89164e80198d54d456c21841eef63434f80d14 /drivers/fpga/fpga-mgr.c
parent16b51447b20c24d79b13a4477fdef93dbba123e4 (diff)
ASoC: mediatek: mt8195: update audio tuner settings
Audio tuner is used to handle clock drift between 26M and APLL domain. It's expected when abs(chg_cnt) equals to upper bound, tuner updates pcw setting automatically, and then abs(chg_cnt) decreases. In the stress test, we found abs(chg_cnt) possibly equals to 2 at the unexpected timing. This results in wrong pcw updating. Finally, abs(chg_cnt) will always be larger than upper bound, As a result, we update the upper bound to 3 to handle the corner case. Signed-off-by: Trevor Wu <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
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