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authorTomasz Moń <[email protected]>2022-01-17 10:19:54 +0100
committerVinod Koul <[email protected]>2022-02-15 11:11:06 +0530
commit5b215c28b923539a04587b6a3f78a449f967ae32 (patch)
treefc8c6bc4bc185816f1577dd64468e758765e0335 /drivers/fpga/fpga-mgr.c
parent4ae7094011bea9c1d5b2ea9d3d4d640b394e9630 (diff)
dmaengine: imx-sdma: restart cyclic channel if needed
Under heavy load resulting in high interrupt latencies, it is possible for imx UART requests to completely fill DMA buffer. When DMA channel is triggered and no SDMA owned buffer is available, SDMA stops. Thanks to the autoRTS feature, there is no data loss due to the SDMA stop if the UART is using hardware flow control. According to DMA Engine API Guide, DMA cyclic operation is performed until explicitly stopped. Restart the buffer after handling channel loop if the channel was stopped by SDMA. Signed-off-by: Tomasz Moń <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
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