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| author | Stefan Wahren <[email protected]> | 2024-09-05 13:15:37 +0200 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2024-09-05 12:55:59 +0100 |
| commit | ff949d981c775332be94be70397ee1df20bc68e5 (patch) | |
| tree | 422dbf55af089fa0366c92e9f035952aab4c04a8 /drivers/fpga/fpga-bridge.c | |
| parent | 5478a4f7b94414def7b56d2f18bc2ed9b0f3f1f2 (diff) | |
spi: spi-fsl-lpspi: Fix off-by-one in prescale max
The commit 783bf5d09f86 ("spi: spi-fsl-lpspi: limit PRESCALE bit in
TCR register") doesn't implement the prescaler maximum as intended.
The maximum allowed value for i.MX93 should be 1 and for i.MX7ULP
it should be 7. So this needs also a adjustment of the comparison
in the scldiv calculation.
Fixes: 783bf5d09f86 ("spi: spi-fsl-lpspi: limit PRESCALE bit in TCR register")
Signed-off-by: Stefan Wahren <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions