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authorRuss Weight <[email protected]>2021-09-16 14:07:33 -0700
committerMoritz Fischer <[email protected]>2021-09-16 15:20:55 -0700
commite9a9970bf520c99e530d8f1fa5b5c22671fad4ef (patch)
tree2197e0266005ead0be3097696f477dc6ba0d047f /drivers/fpga/fpga-bridge.c
parenta1e4470823d99e75b596748086e120dea169ed3c (diff)
fpga: dfl: Avoid reads to AFU CSRs during enumeration
CSR address space for Accelerator Functional Units (AFU) is not available during the early Device Feature List (DFL) enumeration. Early access to this space results in invalid data and port errors. This change adds a condition to prevent an early read from the AFU CSR space. Fixes: 1604986c3e6b ("fpga: dfl: expose feature revision from struct dfl_device") Cc: [email protected] Signed-off-by: Russ Weight <[email protected]> Signed-off-by: Moritz Fischer <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
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