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| author | Stephen Boyd <[email protected]> | 2024-08-21 17:24:30 -0700 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2024-10-09 16:25:32 -0700 |
| commit | e978201bc530b5566dff5c531dc17a20e0158803 (patch) | |
| tree | cbc686e2de825d3aded69766363c71ecc4888ae6 /drivers/fpga/fpga-bridge.c | |
| parent | 00977af42106e82bb2971c59e20d5e02c52e2a65 (diff) | |
clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties
Add unit tests for the two types of assigned rate properties. Test
different combinations of assigned clocks and make sure that rates
aren't assigned when the DT properties are malformed or are zero.
Cc: Peng Fan <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions