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authorWanpeng Li <[email protected]>2021-06-07 00:19:43 -0700
committerPaolo Bonzini <[email protected]>2021-06-08 12:22:26 -0400
commite898da784aed0ea65f7672d941c01dc9b79e6299 (patch)
tree32206b1e1480ff8574a97ef8f569444858c117a4 /drivers/fpga/fpga-bridge.c
parent4f13d471e5d11034d56161af56d0f9396bc0b384 (diff)
KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer
According to the SDM 10.5.4.1: A write of 0 to the initial-count register effectively stops the local APIC timer, in both one-shot and periodic mode. However, the lapic timer oneshot/periodic mode which is emulated by vmx-preemption timer doesn't stop by writing 0 to TMICT since vmx->hv_deadline_tsc is still programmed and the guest will receive the spurious timer interrupt later. This patch fixes it by also cancelling the vmx-preemption timer when writing 0 to the initial-count register. Reviewed-by: Sean Christopherson <[email protected]> Signed-off-by: Wanpeng Li <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
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